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Course Specification

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CSCE434, CSCE834 Course Specification

Catalog Description:

Introduction to VLSI design using metal-oxide semiconductor (MOS) devices primarily aimed at computer science majors with little or no background in the physics or circuitry of such devices. Includes design of nMOS and CMOS logic, data-path, control unit, and highly concurrent systems as well as topics in design automation.

Current Course Homepage:

http://csce.unl.edu/~seth/CSCE434-834Fall03/index.html

Textbook(s) and/or Other Required Materials:

  1. J. M. Rabaey, A. Chandrakasan, and B. Nikolic, Digital Integrated Circuits ,(2nd Edition) Prentice Hall, 2003.
  2. Sung-Mo Kang and Yusuf Leblebici, CMOS Digital Integrated Circuits Analysis & Design, McGraw-Hill Science/Engineering/Math; 2nd editio, 1998.
  3. Neil H. E. Weste and Kamran Eshraghian, Principles of CMOS VLSI Design: A Systems Perspective, Second Edition, Addition Wesley 1992.
  4. Wayne Wolf, Modern VLSI Design: A Systems Approach, PTR Prentice Hall, 1994.
  5. Peter J. Ashenden, A Designer's Guide to VHDL, San Francisco, CA, Morgan Kaufmann, 1996.

Prerequisites by Topic:

  1. Mastery of: Boolean algebra, logic circuit design, and computer organization.
  2. Familiarity with: hardware description languages, design tools for logic synthesis and programmable logic design.
  3. Exposure to: electrical circuits and basic laws of electricity.

Course Objectives:

  1. Mastery of: VLSI circuit design and verification (standard cell and FPGA) using CAD tools.
  2. Familiarity with: Physics of VLSI circuits (transistor physics, delay analysis Fabrication process, Layout analysis.
  3. Exposure to: Testing techniques used in manufacturing.

Topics Covered:

  1. Introduction to VLSI circuit classes.
  2. Introduction to design-process.
  3. Adder/multiplier - gate-level circuits (for lab experiments).
  4. N- and P-channel transistor layout and their physics.
  5. CMOS circuits (transistor level).
  6. VLSI fabrication process.
  7. Delay analysis and optimization techniques.
  8. Physical layout techniques.
  9. Programmable VLSI circuits: fabrication aspects,
  10. Analysis of commercial FPGAs.
  11. Floor planning techniques.
  12. Fault models and test techniques.

Relationship of Course to Program Objectives:

Contributes to Program Objective 4 through Program Outcome 4 by providing up-to-date information and depth of knowledge in the course topic.

Contribution of Coruse to Meeting the Professional Component:

Contributes to. criterion 4(b) by providing depth of knowledge in a specific engineering topic.

Class/Laboratory Schedule:

Lecture: 45 hours = 3 hours/week for 15 weeks